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Re: Fbox transparency on ADV7623/ADV7626

Hi Jeyasudha,  We actually knew that we could do this with iboxes but unfortunately we would need way more than 128 iboxes for our application.  Thank you once again. Best regards,Kevin

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Re: Programming AD5122A

Thanks for the quick response. I would like to write I2C code to RADC for linear increment/decrement from its default (0x70)  wiper condition of both the channels using command number 4 and 5. I would...

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Re: BF609 SPI Programming Example

Thanks! Using the Example I managed to either read or write. However, I also want to read back data while transmitting. Unfortunately, it is not clear how to set the registers for that.......

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Re: ADE7753 Sample sequence

Hi Christian Yes. The HPF is enabled by default. But I wanted to verify if you had disabled it for some reason. When +0.5Vpeak (Full scale) signal is applied at the inputs, the equivalent RMS code...

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Re: AD7606: Inconsistent output value

Hi Reinhard, Jonathan,  Thanks for the response, I meant STBY it's a typo. I am using AD7606 Evaluation board, so REF SELECTION is on external I guess, (R6, R20 are in place thought the eval data sheet...

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ADIS 16210 /PCBZ interfacing with ARDUINO UNO.

Hi, I need help on the following questions regarding ADIS16210/PCBZ. Any help regarding the same will be appreciated.   1. What is the pin layout(numbering) of the J1 connector on the breakout board of...

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Re: IP3 measurement of ADRF6516

OIP3 was measured in dBV, not dBm, because the ADRF6516's output was driving an 8:1 balun, which presented a 400 load to the output.    Can you provide a schematic of your test setup (I didn't quite...

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Re: AD9910 Evaluation Board

Hi Zach, When DSB tested the synchronizing two eval boards, he didn't cut any traces he just overdrove the pin using a pattern generator. In CN-0121 it shows a DG2020A driving the I/O_Update lines.  In...

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Re: ADE7763:Power Measurements

Hi Farahin The active power algorithm of ADE7763 is implemented in such a way that it looks at the time domain samples of V and I in a coherent manner. So, the phase information is taken into account...

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Re: AD9361 PLL N fractional 0

The frequency correction registers are contained in two registers. Write the two register values first and use the "update bits" after the two writes. Do not have the update enabled between the two...

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Compiler warning cc0167

This question applies to both VisualDSP++ and CCES. I'm trying to understand why the Blackfin compiler gives me a cc0167 warning for the following situation. typedef int test_type[5]; ... void...

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Re: Channel Status RAW valid intermittent with Dolby TrueHD 7.1 on ADV7623

For what its worth, I am using an older version of the SDK but there is a comment in the rx_isr.c file where it handles the Channel Status interrupt. It reads......

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Re: AD9910 Phase offset validation

I change the phase offset from 0 to 180deg for my Profile0 and apply Load, and then Load again from the Control window of the evaluation board software. I don't have matched latency nor OSK enabled....

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ADF435x software

The latest ADF435x software is attached. This is compatible with ADF4350 and ADF4351. Installation process:1. Disconnect any evaluation board2. Download and run the attached installer3. Click...

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ADF4360 Evaluation Board Control Software

The latest ADF4360-x software is attached. Installation process:1. Disconnect any evaluation board2. Download and run the attached installer3. Click Next/Continue/Finish when asked4. Connect your...

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ADF4350 and ADF4351 software and USB microcontroller firmware source codes

The source codes for the ADF4350 and ADF4351 evaluation board control software and the evaluation board USB microcontroller firmware are attached below. Warning: You use this at your own risk and it is...

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Re: AD9910 Phase offset validation

Yes, with a 1GHZ system clock 79 SYSCLK cycles is 79ns.  After the profile register is changed with the new phase offset and the update pulse is sent, you will not see the phase change on the output...

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Re: IP3 measurement of ADRF6516

I've attached the block diagram of the setup. (ADL5380 eval bd. feeding the ADRF6516 Eval Bd). The VGA was set to max gain (111) and gain control voltage to .6 V , which correspond to 27.5 dB voltage...

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Re: IP3 measurement of ADRF6516

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Re: AD9910 Phase offset validation

Does clicking load after changing the new phase offset then effectively send the update pulse ? I also click Load from the main control window too but, in both cases, I see no inversion of my DDS...

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