Re: ML605+ADFMCOMMS3
Fengkui, The baud rate for the ML605 project was set to 57600bps, so other rate settings will not work. Regards,Dragos
View ArticleZed+FMCOMMS2 initialization settings
Hi,I am using KC705+FMCOMMS2 and experiencing a problem. The data I receive from the FMC seems distorted (as I explained in this thread.) This problem does not occur in Zed board + FMCOMMS2 & IIO...
View ArticleRe: Re: Re: AD5933 and AD5934 evaluation board software commands
Hi, Zero means no error.
View ArticleRe: AD534 SF Problem
Hi Samuel, I'm currently working on this issue. I set up the circuit on the lab and the output is not what is expected.I'm still not sure what is the problem.I will just get back to you soon on this....
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Re: Zed+FMCOMMS2 initialization settings
Hi Mike, You can find the Linux driver for AD9361 (linux/ad9361.c at xcomm_zynq · analogdevicesinc/linux · GitHub) and the device tree for the Zed project (linux/zynq-zed-adv7511-ad9361.dts at...
View ArticleSome Question about edit BF609 LDF
Dear allIf i want to Placing code in External memory(L3) instead of L1/L2 .and L1 used only for cache, L2 used for data share between Core0/Core1.How to edit the LDF???
View ArticleRe: operate on AD-FMCOMMS3-EBZ
Hi Dragos， Thank you for your quick reply .I then look into the main.c and I think the default DAC source is DATA_SEL_DMA, and the problem didn't sovle either . Can you explain why? the main .c...
View ArticleQuestion about ADE7756
Hello, I'm working on the project with ade7756 but I'm new for ADE7756. I have some questions. I use the scheme with 240V->0.470V and 2A->0.001A (1:2000 current transformer). I would like to know...
View ArticleCPLB miss without replacement lwip bf537
I'm running lwip + vdk project (Analog Devices C++ 5.0 update 10.1) on an ADSP-BF537.The application uses both udp and tcp (several tcp sockets).The problem is that i sometimes raise the condition CPLB...
View ArticleRe: operate on AD-FMCOMMS3-EBZ
Wang, By default, DAC_DMA is not defined. You have to manually define it: #define DAC_DMARegards,Dragos
View ArticleGet VDSP++ version for a compiled Library?
I was wondering if it is possible to retrieve the Visual DSP++ version which has been used to compile a given Library?Do someone know a way to extract this info from the Library? Many Thanks!
View ArticleRe: AD-FMCOMMS3 GNU Radio access from network
Hi Mickael, You need a program called "iiod" running on the Zedboard. This one uses the port 30431.The simplest way to get it is to update the operating system. See...
View ArticleADV8003 working mode 9 bypass function
Hi ,everybody Could you help me to config the registers of ADV8003 for mode9 bypass working? May I have the values of the registers?Thanks.BR!
View ArticleRe: operate on AD-FMCOMMS3-EBZ
Dragos, I have try several times but it seems not correct. If I want to change the wave in the main ,how to do ? I saw that sine_lut[32] is a const . Or do you have some further explaination of...
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Re: BF609 EPPI GP mode output ITU656 image
Hellp all, Is anyone willing to help out there? Thanks.
View ArticleRe: Obtaining the desired rx_clk_in in the FPGA
Hi Oriol, The reason of the 4x times relation is quite simple, on 2rx2tx mode, you going to have two ADCs and two DACs, that means your LVDS interface needs to run 4 times faster to be able to move the...
View ArticleRe: Obtaining the desired rx_clk_in in the FPGA
Hi Istvan, thank you for your reply. If you read the last paragraph of our original question you will see that indeed, we have unsuccessfully tried to modify the FIR interpolation rate. Independently...
View ArticleRe: Ref Design KC705 AD9364 Role of DDR3 cntrl and DMA
Hi Vaibhav, You can download the reference manual and the register map of the chip, from here. So you can check out what those other bits are. Regarding the FIR filter, I see you changed the rx/tx...
View ArticleRe: Zedboard + FMCOMMS2 Reference Design
Hi, thanks for your reply. Unfortunately a colleague of mine borrowed the board over the weekend, so I have to wait until Monday to test it with provided files. Until then I will have a look at the the...
View ArticleRe: customizing 489_spi boot kernel with a different CS pin
Hi Sidney, In ADSP-21489 SPI master boot mode, the processor initiates the booting operation by activating the SPICLK signal and asserting the SPI_FLG0_O signal (used as the chip select for SPI Flash)...
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