Re: Aux ADC value settling time
Hello Christian, I believe the latency between the ADC input and the DSP core is about two samples. So, you need to wait at least that long after switching your multiplexer for the input of the...
View ArticleRe: ADV212 question
14/16 bit settings are in custom mode and you write that directly into PMODE1 in the PREC field. In custom mode, the PREC encoder parameter is ignored. In non-custom mode, the firmware writes that...
View ArticleRe: ADV7181D 12 bit RGB 4:4:4 DDR mode
Figure 5 does not show the specific timing for a RGB 444. What I want to know is: Given that the LLC clock is 2x (27Mhz), does the adv7181d transmits 2x 720, or 1440 pixels, requiring my FPGA to only...
View ArticleRe: VisualDSP automation - Masking Interrupts
Craig, This seemed to work, however I am seeing now that I am only able to set the registry options, not able to set the debugger option. My process is as follows: app = new ActiveXObject(...
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Re: ADAU1701 SPI mode
Hello Christian, I'm afraid that if I mentioned previously that mode 3 was possible, that was a mistake. Actually, if you look at the datasheet, the timing diagrams for SPI clearly show that the device...
View ArticleRe: AD9777 overall delay
If you don't need interpolation the AD9747 Dual DAC offers the lowest latency, 7 clock cycles. It is not pin compatiable to the AD9777. We have not DACs pin compatiable to the AD9777 and we don't use...
View ArticleRe: CN0224 Altium Designer
Hi Dani, I'll ask around but I think what is there is all we have. Dave
View ArticleRe: Sigmastudio not saving IIR table coefficients in index selectable filter
Hi Gertjan, I finally managed to see what you're seeing. I think the key is actually in using the arrow keys. When I use the drop-down window, I don't have problems, but when I scroll through the...
View ArticleRe: ADV7181D 12 bit RGB 4:4:4 DDR mode
From Table 10, 5th line down, Pixel port P19], the up arrow indicates that B[7] is valid on the rising edge of the clock, and the down arrow indicate R[3] is valid on the falling edge of the clock....
View ArticleRe: TS201S EZ Kit CPLD to communicate with an external A/D converter
Thanks for the support! Pedro Paulo.
View ArticleADAU1761 problems on Zedboard
I am using the Avnet Zedboard,the controlling unit is ZYNQ(Xilinx FPGA+ARM),there is a ADAU1761 on this board. Now the FPGA have generated the I2S timing,the ARM have configured the chip by I2C,and...
View ArticleRe: IMAGEON FMC ADV7611
Hi Steven, I've mainly tested with qv4l2 utility, but also tested streaming video with vlc. You need to select a video mode first though. In qv4l2 you can do this by selecting the mode from the...
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Re: Amplitude demodulation
Hi Allthanks to Joel who helped for AM demodulation, much appreciated. While I solved the demodulation of my 1.1 GHz carrier, I need now to generate 8 carriers , spaced of 100 MHz from each other, to...
View ArticleRe: AD2S1210 LOT and DOS pins are always low
I found the problem, there was a software bug and the sample pin was not triggered correctly, so if you have the same problem check the sample pin first!
View ArticleRe: AD9643 - how do control the sampling rate?
Dear Harris: I am sorry for I haven’t added the explanation for the register settings for the AD9623-1 on last post. Now, I have listed the settings by following Kyle’s suggestion updated...
View ArticleRe: A quick question about the EVAL-CED1Z
Hi Johnny, Thanks again for clarifying. As it is I've now bought the AD7760 combo and look forward to exploring what it can do. Cheers, Jesper
View ArticleRe: Please help, every time I read zero value
Hey Dlath Apologies for this let response, no need for explanation, but hope that you understand the situationAbout my post, the problem is gone. Reason mysterious short circuit, now chip is working...
View ArticleDither in ADC
To improve ADC SFDR, dither can be applied in 2 ways: low freq noise at the analog input, or 2) wideband noise from an internal DAC is summed with the signal and the digital output is corrected atfer...
View ArticleRe: AD620 oscillation with long cable drive
Hello gentlemen, Thank you for the advice.I will check with the customer about the circuit problem you pointed out. Best Regards,Ricky
View ArticleRe: How to use Inter Core Communication on bf609?
hi Zen0110 Can you tell me how you find the ICC？I have updated the buildroot，but the compiler error，Can you give me some steps？
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