Re: H-Bridge Driver Circuit CN-0196
Hi thereI'm afraid you cant - all of the power MOSFETs are only rated to 60V, as well as their anti-parallel diodes, the dc bus capacitors (which are all 50V rated), bootstrap diodes etc etc. There is...
View ArticleRe: Zedboard FMCOMMS2 GNURadio Data Dropouts
Hi Paul,Thanks for the quick reply. To clarify, you're saying the zedboard locally can't even keep up with 1.5MSPS? So I would expect dropouts at any data rate if I process locally? And the max limit...
View ArticleRe: hardware tools to program BF506
Hello Al,thanks for the answer. I am programming the DSP eva-kit using CCES for a prototype.But I am interested to make a final product using the BF506 chip. If I use the dspFlash, what software should...
View ArticleRe: EVAL-ADV8005-SMZ Question on enabling JT6 Header
Can you send me the RS232 output from your board? -Matt
View ArticleAD9361 Rx Analog Group Delay
I am struggling to find a straightforward way to compensate for the Rx Analog Group delay in a general manner. I have an application that would like to use all the available sample rates of the AD9361...
View ArticleRe: hardware tools to program BF506
The dspFlash programmer just uses a standalone Windows program that we provide. An ADI ICE can program flash using a flash utility plugin for CCES. It is not designed for production programming, but...
View ArticleADAU 1451 slave i2c port trouble
I have a board which I upgraded from an ADAU1701, to an ADAU1451. The ADAU1701 was working perfectly I just needed more horsepower. I connected the part with i2c control, using the slave port which is...
View ArticleRe: 122.88 MSPS vs 61.44 MSPS possible on AD9361 FMCOMMS3-EBZ?
The "AD9361 Interface Specifications" lists the "Maximum Data Rate" for 1R1T configuration in LVDS mode as 122.88 Msps. However, the maximum usable bandwidth will still be limited by the same 56 MHz...
View ArticleRe: ADAU 1451 slave i2c port trouble
FYI, I have looked at the i2C signals at the part and they are good. Clean with full levels. The input MCLK is present and running. -david BTW
View ArticleAD9364
Hello, I'm interested in the AD9364 for use in my application and would liike to know if you have SFDR and ENOB data for the receiver? Best Regards.
View ArticleRe: AD9106 and FSADJ registers after reset
Thanks Larry for your swift response. Appreciated.
View ArticleRe: ADG439F analog multiplexer
Hi Sriya, For the ADG439F you can refer to the Absolute Maximum Ratings for details on the Voltage and Current handling ability of the part in the datasheet. For continuous current the AMR is 20mA....
View ArticleCN0194 - Galvanically Isolated 2-Channel 16-bit ADC
Hi, I am a student in final year of engineering. As a part of our curriculum, we have to make a project. My project is to develop a data acquisition card. The features required for my project is along...
View ArticleRe: AD9278 dinamic range
Hi Ramos, Have you tried digital test patterns on the chip to check the data capture first before you inject an external signal? I will need more information about your SPI settings to help you out...
View ArticleRe: Modifying Tx Path for FMCOMMS2 (ad9361)
Hi, Ok, so interrupts work, there is one start of transfer interrupt generated, but that's it. Going back to the previous regmap state that you provided it looks as if the DMA controller is waiting for...
View ArticleRe: AD9361 timing parameters
Data bits come out at the same time. tddrx and tdddv are relative timing specifications for DATA_CLK to data output bus and RX_FRAME. Please look at Figure 81. Data Port Timing Parameter Diagrams—LVDS...
View ArticleRe: Drivers ADAU1701 for Debian ARM
Hi, This driver is a board driver that is specific to the Blackfin platform, so you can't enable it on your allwinner platform. You'll need to create a similar board driver that is specific to your...
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