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AD9361 Rx Analog Group Delay

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I am struggling to find a straightforward way to compensate for the Rx Analog Group delay in a general manner.

 

I have an application that would like to use all the available sample rates of the AD9361 (from 61.44Msps down to 0.25Msps).  The application would also like to provide precision timestamping of the AD9361 output.  It currently configures the BBPLL, divider, half-bands, and fir on the fly to achieve a requested rate.

 

I am confused on the correct way to configure the analog filtering.  The "BBBW" as described in the "BASEBAND RX ANALOG FILTER CALIBRATION" section of the "AD9361 Initialization and Factory Calibration Guide" must be between 0.2 and 28MHz.  Does this limit imply that register 0x1FB - Rx BBBW MHz must be no larger than 28?  The AD9361 Filter Wizard allows me to put values larger than 28 in the Fcutoff field.  In fact for larger sample rates, Fcutoff must be larger than 28 to yield acceptable Group Delay Variance numbers.  Are Fcutoff and BBBW the same thing?

 

Changing the analog filtering for each sample rate yields to a group delay tracking nightmare.  Is there a closed-form expression to compute the group delay at DC of the analog filtering given the resistor and capacitor values found in registers 0x1E0-0x1F5 (BBF), and 0x1DB-0x1DF (TIA)?


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