Re: Modifying HDL Design, FMCOMMS5 and ZC706
Thanks Lars,that helped. (In your case you might have to add 1 byte of padding at the end (so you get a multiple of 8)). When you say this you think that I should make even multiple of 8. So for...
View ArticleAD9656 EVAL Board + HSC-ADC-EVALEZ documentation?
Hello, Irecently bought AD9656 EVAL Board + HSC-ADC-EVALEZ. I dont find more documentation for mopre detailled about Sync_Input or REFCLK FPGA EXTERNAL in the AD9656 EVAL Board and about WGA_REF...
View ArticleRe: ADV7280-M video capture issue with i.MX6Q
Hi Yury,Could you please post your question up as a separate thread on Engineering Zone. Your issue might be separate to Stathis' and it might confuse proceedings. Thanks and Regards,Robert...
View ArticleRe: Modifying HDL Design, FMCOMMS5 and ZC706
The bus is 8bytes wide (64bits), so you need to transfer a whole multiple of 8bytes i.e. Nx8bytes. In your case N = 16 would suffice since 16x8bytes=128bytes which is > than 127bytes, you then need...
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ADV7611 YCbCr output format
Hello all, We will use "SDR、24-bit 4:4:4 YCbCr format output2". We would like to confirm the connection of dataP[23:0] but can not find description of datasheet and user manual.We can find description...
View ArticleH-Bridge Driver Circuit CN-0196
Hi, I'm using H-Bridge Driver Circuit Using Isolated Half-Bridge Drivers ( CN-0196 ) and i want to supply with 300V. 1- Can I ?and if not wich part i must modified 2- how much frequency limitte with...
View ArticleRe: EVAL - AD7195EBZ REF problem
Problem solved. It ships with jumpers in place for a noise test. When those are removed values look far more sensible on AIN3,4
View ArticleRe: AD8436 DC Voltages
Hi John,Yes you're actually ac coupled if you still have the 10uF between pins 2 and 3. If you remove the, capacitor, you'll have the root sum of the dc and ac inputs, as described in AN-1341 (link...
View ArticleRe: HMC642LC5
Moved this question on the HMC642 to the Hittite Microwave Products from ADI community.
View ArticleRe: fmcomms data rates
Hi Lars, It's a custom kernel. CONFIG_DEBUG_FS is set, but I didn't have it mounted. Unfortunately, after mounting with "mount -t debugfs none /sys/kernel/debug" and re-running the application, I...
View ArticleRe: AD9122 clocking and sampling rate.
Jetmir, These changes should be enough: 1, //pll2_ndiv_a_cnt 6, //pll2_ndiv_b_cnt 0, //pll2_freq_doubler_enNo other dividers should be modified manually. Regards,Dragos
View ArticleRe: Custom IP and problems with registers in software part.
Jetmir, "it is not a good idea to ad new IPs at reference design since it will change the registers space for the software part. " - this statement is only true, if you're IP has internal registers,...
View ArticleRe: adau1373 PLL config
Hi Lars, When I try arecord I get following error:# arecord -D 'hw:0,0' -r 48000 -d 10 -f dat song.datRecording WAVE 'song.dat' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereoarecord:...
View ArticleRe: ADF4159 REFIN level
You're right - the evaluation board does violate specifications. This isn't a problem for short term use of the ADF4159 but, for long term reliability, the REFIN signal must meet the specifications....
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Re: Communication system toolbox hardware support package for xilinx zynq...
Shobi, You can download the support package from this page:Zynq SDR Support from Communications System Toolbox - Hardware Support There is a blue button called "Get Support Package Now" on the right...
View ArticleRe: adv7180 decoder is not capturing...
a) A PAL frame consist of 2 fields, even/odd as you've noted. It sounds like your capture is not capturing and integrating one of the fields correctly. Are you handling the Field signal correctly b)...
View ArticleRe: HDMI signal coming out from ADV7511KSTZ-P on a custom board is identified...
The fact that one TV works indicates your circuits above are correct. You can always tack a 10k resistor on HPD to see if it helps. Another cause might be that your FPGA is not generating correct...
View ArticleAduC832 SPI interface in Slave mode does not work with SPICON=0x20 or 0x24
Hi !I am using AduC 832 SPI interface to interface with and test my custom FPGA hardware with an SPI interface.When I set up the 832 as Master (SPICON=0x37) it works properly.. However when I set up...
View ArticleRe: ADIS16201 - Output data rate? - Alternatives with wide bandwidth?
Thank you! I would probably start with the ADXL350. http://www.analog.com/adxl350 Tagging a couple of mycolleagues to make sure but it seems to be closest to everything you are asking for. The noise...
View ArticleRe: ADL5511 Evaluation board
Any chance you can plot this in Excel? It's very difficult to see bumps in an increasing transfer function from looking at the un-plotted numbers.
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