The fact that one TV works indicates your circuits above are correct.
You can always tack a 10k resistor on HPD to see if it helps.
Another cause might be that your FPGA is not generating correct CEA-861 timing for the 1080i25 signal. Some TV are more tolerant to input timing then others. This includes the pixel clock rate, syncs and field signals. If a TV doesn't like the signal, normally they just go black. From your FPGA can you output the clock and 3 sync signals and verify they meet the timing exactly.
The problem might also occur if the FPGA generates the pixel clock. Normally FPGA clock generators use internal PLLs which have too much jitter and and it's accuracy is based on the input clock accuracy. In general we recommend using a crystal or oscillator for the pixel clock. Again some TVs might be more tolerant then other TVs when it comes to pixel clock timing.