Re: AD9910 Dig Ramp Mode Capabilities
thanks for the response. -Do you know roughly what the max freq for 14bit output in DRM mode would be on AD9910? -Just to check: the freq of the ramp is the amount of time from 1 step to the same...
View ArticleRe: Help with AD8302
You should not need much signal conditioning before applying the signal. What is you frequency of operation and the range of signal levels that will be applied? If the signals are 90 degrees apart...
View ArticleRe: ADA4961 evaluation board not working
Hi, Mike, There are a couple of baluns and also PI-attenuators connected to the input and output of the ADA4961 on the evaluation board (cf. schematic on p. 23 of the datasheet). The input...
View ArticleRe: AD8302_ S parameters file .SNP
S11 with and without a 50 Ohm resistive match attached.
View ArticleRe: What is the input current range for the VLx pins?
The user can select any current in the resistor divider. You just need to balance that against the error due to the leakage current into the device pins. The datasheet specified +/-30nA max current...
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Re: ADV7180: a shift in vsync without change in lock status?
> My guess is that the VCR is outputting incorrect Vsync information and the ADV7180 is unable to correct for this. You could test this by feeding the output from the VCR directly to a monitor/old...
View ArticleRe: recommended method to version control hdl proj originating from github
we all got to love xilnx ... man... thanks - yeah I'll see if I can use the tcl method and modify things for non-project mode - thanks!
View ArticleRe: External Reference Issue
I can confirm that this works at 20MHz sine wave 1.3V peak to peak.
View ArticleRe: ADP2503 - Noise@400MHz-EMC Testing
Nitin, unfortunately the resolution of the schematics you attached is not very good so I am just commenting on what I can see. First of all, there is nothing in the part itself that runs in the 400MHz...
View ArticleRe: A -1701 FM MPX Demodulator
Hello Jim, Thanks so much for bringing the SSB trial to my attention, I had no clue. Probably my experiment with SSB demod at 96 K would have worked with a 40 KHz analog LP filter ahead of...
View ArticleRe: ADL5535 1PdB - 1dB Compression Point Unterstanding
The P1dB specified for the amplifiers is correct. Gain compression in high frequency amplifiers is defined by non-linearities in the system. I'll provide a more detailed response shortly.
View ArticleUnderstanding S5 switch on ADAU1701-MINIZ
Dear friends! I'm quite new to the ADAU family of devices, so probably I'm going to ask some long-before-answered questions just due to lack of skills in web search, but, sorry, here it goes anyway)...
View ArticleRe: ADL5535 1PdB - 1dB Compression Point Unterstanding
This is just a guess, but if the P1dB is specified for a conjugate match to the device output and the real part of the output impedance is less than 50 ohms, then the power output would be...
View ArticleHow to disable auto negotiation of PHY DP83640 in stmmac driver or other place?
HI, thereI need to disable auto negotiation of phy DP83640 in stmmac driver or maybe other place (uclinux 2014R1), but I donot know how .The reason why I need to do this is that our customer board...
View ArticleRe: Newbie Needs Help Loading Profile in AD9548 Eval Software
Neil, Thanks for the .psu file. I loaded it successfully into the AD9548 Eval Software. And afterwards, I saw the parameter settings in the Profile Summary window. I compared your .psu file with the...
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Re: ADL5535 1PdB - 1dB Compression Point Unterstanding
The datasheet states "Input and output internally matched to 50 Ω", so I've naively connected the input to a matched source and the output to an Agilent spectrum analyzer directly, and the measured...
View ArticleRe: DC/DC design using ADP1046
With a 2/3 turns ratio (N1/N2) the output on the secondary of the transformer will by 13.5V at 9V input. The ADP1046A will still function as a DC DC providing the appropriate duty cycle that will step...
View ArticleRe: Using FMCADC2 with VC707
I was able to see ADC data through ILA! First, I needed to hook up the adc_data in the axi_ad9625_core to a new ILA core. Next, I built the bit file and flashed it to the FPGA. Next, I ran a modified...
View ArticleRe: How to route TDM audio through multiple ADAU1701s?
Hello Bob! Real nice one with 4 ADAUs standing in a row) lifts up spirits for sure))) Could you please further clarify with master clock sync between the ICs? I'm thinking of a design with just two...
View ArticleMic level to Line Level
I am using the ADAU1401A, which has a 2 channel ADC input. I need to connect a Microphone and Line Level input to this chip. The only way I could think of doing this was connecting a 3.5mm TRS Line...
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