Hi,
I need to ask similar question for LT1028.
Can LT1028 be configured as inverting amplifier with Gain of 0.5? Is there any stability concerns? Hardware setting is Rf = 0.5kohms and Rg= 1kohms.
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Re: Can ADA4627 be used as an attenuator for Gain of 0.5?
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Question about HMC8410
Hi,
Is pin# 4 of HMC8410 NIC or Vgg2? According to Table 5 in the HMC8410 data sheet, pin# 4 is NIC but Vgg2 is connected to pin# 4 shown in Figure 40 (evaluation board schematic) .
- pin# 4 is NIC and should be connected to RF/dc GND.
- pin# 4 is Vgg2 ** In this case, please let me know Vgg2 spec.
- Other **In this case, please let me know where pin# 4 should be connected to.
Which is correct?
Regards,
Kazu
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Re: AD5683 SPI examples
Hi,
Which platform are you using? For linux systems, we have an available Linux driver for AD5683.
Unfortunately for microcontrollers, we currently do not have drivers for that, however, you may check AD5684 no OS driver as your reference, but there are a lot of things needed to be changed to make it work with AD5683.
Cheers,
Ivan
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Re: AD9371 POWER SUPPLY(ADP5054)
Hi Justin：
My Schematic has a fault in the red circle. The fault is S1 of U12（MOSFET） connect to DL1 of U11（ADP5054）.Normal S1 connect to AGND. What happens if this problem exists？ The ADP5054 the second chanell will be hurt? Can ADP5054 work well if I have revised this problem. In addition， Can you tell me the use of the MOSFET?
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ADSP-SC587 adi_rom_boot() for Second Stage Load
HI,
I just start to develop a new firmware platform with ADSP-SC587, there are so many questions that i cannot figure it out.
For now, i foucsed on the program upgraded, here i met some issues, i wondered if anyone famaliar with ADSP-SC587 SSL function adi_rom_boot() ?
I have two project, one is Main code means APPLICATION, another one is Bootloader(bootloader is used to do the second stage load). I try to use the Bootloader code to flash the APPLCAITON code in the flash. In order to realize that, when the main code executes in some part, it was commanded to jump to Bootloader, i used function adi_rom_boot:
Here below part of my code:
/*Configuring the SPU secureP registers for boot peripheral to do secure access to memory*/
*pREG_SPU0_SECUREP106=0x3;
*pREG_SPU0_SECUREP82=0x3;
*pREG_SPU0_SECUREP5=0x3;
*pREG_SPU0_SECUREP162=0x3;
*pREG_SPU0_SECUREP88=0x3;
*pREG_SPU0_SECUREP89=0x3;
adi_rom_boot((void*) 0x60800000,0,0,0,0x80207);
return 0;
the pAddress is ox60800000, because i flashed the bootloader code with cldp.exe through ICE-1000 with an offset 0x800000. And the main code(APPLICATION) was flased into the same section, but the start address is 0x60000000.
the two project code was flashed into the same flash, but they have different spac.
In addition, the adi_rom_boot() was invoked in Core2, and the Bootloader code was also realized in Core2.
However, i have no idea why the main code cannot jump to the bootloader with fucntion adi_rom_boot((void*) 0x60800000,0,0,0,0x80207) ?????
i am not sure if there are some system file should be added into the project or there are some mistake in my code ?
Plus, i am not sure it necessary that the adi_rom_boot() should be invoked in Core0 ?
Please kindly to suppor new starter for ADI DSP analog-admin
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Re: DDS AD9910，used for Radar signal processing, found the amplitude of the linear-frequency-modulation signal output changes regularly, like a sine wave
Thank you, KennyG.
I use my own custom design. The AD9910 board and FPGA configuration board are seperated for some reasons, connected by J30J connector.
The result is still the same after setting CFR1[15] to 1.
I know that the samples generated by the DDS do not always coincide with the normalized peak of the sinusoidal waveform, but the output data latency is definitive according to the datasheet. So I think, althought should not, the output wave should be almost exactly the same, althought the sinusoidal waveform can't be sampled at the peak. The key point to this problem is that the difference is regular, it won't cause a problem if the difference is slight and irregular.
I am working on this problem. Hope to get any advice.
Thanks.
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Re: FDD independent mode
How are you controlling ENABLE and TXNRX pins? in FDD independent mode these pins decides the TX and RX enable
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Re: the PLL of bf533
I read the data sheet of bf533, it said that the RTXI pin should be pulled low when not used.
If the real time clock is not used and i didn't pull the RTXI and RTXO ports low.
Will the above situation affect my core clock?
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Re: Seeking an amplifier capable of delivering a single ended output in excess of 2V p-p at 1GHz to a 100 ohm load Arthur Williams abw06280@hotmail.com
Hi,
I moved your question here in RF and Microwave community. Someone would be able to answer your queries here.
Regards,
Goz
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Re: ST-Link Debug for ADUCM36x
Hi Raffaele,
The ST-LINK/V2 is an in-circuit debugger and programmer for the STM8 and STM32 microcontroller families. Not for ADI micro controller.
I suggest you having a try. If it's possible, welcome to share your experience.
Thanks
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LTM4607 burns out
Hello,
We have designed a power circuit for our application. For 24V/0.5A we've used LTM4607 regulator with 9V to 30V input. But we had some problems:
When input voltage is 9V - everything is OK. 12V, 24V, 27V - same. But if we start raising voltage to 30V - LTM4607 burns out. It seems like M1 or M2 transistors is broken. We have lost 3 LTM4607 by now.
About our implementation:
FCB pin is left unconnected, so the regulator should work in "Skip-Cycle Mode". SS pin pulldown by 0.1uF capacitor. Output current does not exceed 0.5A. A inductor - XAL7070-332ME. VFB pin pulldown by 3.4kOhm resistor. PLLFLTR pin voltage is 2.4V. Rsence is 10 mOhms.
What could be a problem here? Why do we lose the regulator in these conditions?
Also we use another two LTM4607 regulators to make 5V and 6V from same 9V to 30V input. And this regulators work fine.
Thank for help,
Ivan
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Re: AD-FMCDAQ2-EBZ + ZC-706 dev kit: unexpected glitch when generating a sawtooth waveform
Sorry for making you wait.
My customer replied.
The customer is now using the recommended HDL downloaded from the site.
The FPGA side consists of Xilinx ZC 706, and the DAC side is made with ADI FMCDAQ 2.
Customer is using DPG Downloader for input.
The customer says that the problem is not solved.
When the customer observes the repetitive waveform, the glidge will eventually be observed.
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Re: AD9361 DAC Explanation
Yes, you can even send more than 128 points. Replace our sine_lut[] with your own data.
Dragos
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EXTCLK application for AD7768-1
Due to some special demands, we need to use External XTAL.
But we can not find the input voltage of EXTCLK. Could you help to check this issue on AD7768?
Now our XTAL is 10MHz@0.8V, sinewave, low jitter and drift. We can not make sure it can work on AD7768-1 or not.
Please also help to check the min voltage input for EXTCLK, and remind to double check in the datasheet if necessary.
Thank you very much.
B.Regard,
Linear
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Building HDL in Vivado
I have downloaded the sources for the HDL and tried to build it in Vivado 2018.1
But i am not successfull. Vivado crashes in each folder. I am not able to build at least one project.
Has anyone an idea how this could work.
This is the last message i got :
Abnormal program termination (EXCEPTION_ACCESS_VIOLATION)
Please check 'C:/daten/xilinx/adi/hdl/library/jesd204/axi_jesd204_rx/hs_err_pid14064.log' for details
and when i look into the logfile i can see this:
#
# An unexpected error has occurred (EXCEPTION_ACCESS_VIOLATION)
#
Stack:
no stack trace available, please use hs_err_<pid>.dmp instead.
Can anyone give me a hint ?
Thanks in advance
Hans-Georg
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Re: AD9689 Vcm export voltage
Hi Umesh,
which Software do you use?
Can you send me correct SPI command sequence to get the VCM export level of 1.4V?
Thanks
Andreas
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Re: Could you help to share HMC774ALC3B the conversion Loss performance at 36GHz to 38GHz?
OK and thanks very much.We'll help to support sample of EVB for testing 36GHz perfromance of HMC774ALC3B.
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Re: ADuC70xy USB Combi-Downloader
now, it could not install in Win10. do you have any other method?
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Re: AD9689 Vcm export voltage
I have exactly the same problem with ad9695 inputs and vref pin floating. Voltage on vref is 1.89V voltage on the input pins is 1.4V.
0x1a4d -> 0x14
0x18e3 <- 0x53
Best Regards,
Rafal
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Is there a footprint available for HMC524A (22 GHz to 32 GHz, GaAs, MMIC, I/Q Mixer)?
Does it have a standard footprint which could be downloaded from elsewhere in .bxl or .dxf format?
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