AD5560 used for multiple power supplies
Hi, We are design engineers from the company, currently we have one project to adopt AD5560 for the power source design, we have LCD module driving with different power rails, totally we have five...
View ArticleRe: AD5560 used for multiple power supplies
We are developing the test fixture for LCD modules and our mass production will reach more than 30K per year, thanks.
View ArticleRe: AD9361 Reference Design for the Altera Cyclone V SoC Board
Hi Dragos Many thanks for the reply & link.Can you further help with a feq follow-up questions:Is there a document with a picture the setup of the design similar to the one we have of the Xilinx...
View ArticleRe: No filters in the receive path on FMCOMMs1?
Hi, Charly Does I understand it right ? About the position of LPF filter be populated, between the ADL5380 and AD8366, or between the AD8366 and the ADC? What do you think? Thanks. Zhonghua
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AD8347 mixer loading
Hello I have some questions from my one of my customers in regard to the device:In non-AGC mode, does he need to place a protection device (PIN diode/limiter) on the input to the mixed to prevent...
View ArticleRe: AD9364 matching
Please see: https://ez.analog.com/message/149912#149912 1. GPO line status is as configured when powered up and transitioned into SLEEP state. After that GPO configuration settings are retained when...
View ArticleHMC1035LP6GE Eval board layout
I was looking to get a layout drawing for the eval board for the HMC1035LP6GE. Can you supply me with a pdf of the board layout, or if possible gerber files. I am not going to copy the layout, just...
View ArticleRe: AD9361 Quadrature Calibration issue
Hi Andy, We will take a look at your problem. Regards,Dragos
View ArticleIntermod level wrt to fundamental reduces with lower input to DAC for AD9364
We are testing the AD9364 in Non-OS mode with scaling the input to the DAC.As the input to the DAC reduces, 3rd order intermod with reference to fundamental levels are reducing, where as it is suppose...
View ArticleRe: ADRF6518 Output common mode
What impedance is the ADRF6518 driving? Can you attach your application schematic? Thanks,Joel
View ArticleRe: AD9361 - initialization data for specific LTE FDD bands
Constantin, You can find the no-OS software on the GitHub: no-OS/ad9361/sw at master · analogdevicesinc/no-OS · GitHubEssentially, you have to call just the ad9361_init() to initialize the part. The...
View ArticleRe: ADV212 HIPI mode issue(compressed image doesn't match the original image)
thanks,I have used 32bits host and DMA width,but the result seems all the same,In fact, the contour of the compressed image (j2c fifle) agree with the original image,pixels' values change,The high...
View ArticleAD9361 RX/TX PLL correction words
Hello,Is it possible to compensate the frequency offset on AD9361 by writing to some registers with correction amount?There are some references to regiters 0x24E, 0x24F, 0x28E, 0x28F in some...
View ArticleRe: AD9361 - initialization data for specific LTE FDD bands
...and yes, you will have to implement just the communication layer (the files from the platform_***** folders). We also have an example of platform drivers for Linux userspace.All the other files are...
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Re: Excat location of accelerometer(s) in ADIS16448
Hi Mark,thank you for your answer. With the caveat of my line of thinking being entirely wrong somewhere, I see the following issues with remapping: First, to correctly remap linear accelerations, one...
View ArticleRe: AD7606: Data capture by setting sampling frequency & buffer mode.
Hi Lars, Yes I verified, IO Expander is connected through I2C bus. And luckily there are 2 GPIOs that are connected to the Quark SoC, of which one of them is BUSY, the other one is unused. I will hook...
View ArticleRe: Problem with ADV7513 setting
We dont have a HDMI analyzer for testing the output. The format of data input to ADV7313 is in SMPTE(SMPTE 274M for 1080i50) instead of CEA-861, i.e, HSYNC is horizontal blanking, VSYNC vertical...
View ArticleRe: AD9364 External LO phase noise
Phase noise at 2GHz: fdBc/Hz[MHz]10kHz100kHz1MHz100MHz2000-100-108-120-157 Your measurement appears to be close to what our measured values. ADC full-scale input is 0.625Vpk so I think the scenario you...
View ArticleRe: Excat location of accelerometer(s) in ADIS16448
Thank you for the hint. The issue was mostly related to a missing support for setting IMU registers from the host system, which I temporarily fixed on the sensor hardware. We should be good to go, and...
View ArticleRe: ADF4007 PLL error output pulsed?
Following the ADIsim simulation you uploaded in this thread: ADF4007 (eval board) as phase detector and PLL I had to change R2 to 81 ohm and C1,C4 to 5 nF, and C2 to 480 nF, but they are really close....
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