I did look at Figure 81 of UG-570, the figure is not very clear on how to interpret the timing numbers - hence the above question. If the data bits come out at the same time , are the min and max values (of 0.25ns and 1.25ns) chip to chip variations? Also, can you qualify the statement "data bits come out at the same time" with a number? Come out at the same exact instant (unlikely)? 100's of ps difference? We are using registers 0x006 and 0x007 to delay clock/data.
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