Hi again Harshit and Jithul,
I have now finished the first prototype implementing all necessary hardware and software for my data acquisition chain. It is surprisingly fast! Thanks again for your help. Actually it is so fast that I cannot understand how it is possible. I think I might miss out on something conceptual concerning cascaded bi-quad filters. I hope you can help me understand this.
The ADC feeding the system with samples runs at 1 Mhz, hence a new sample is produced every microsecond (us). I am using the bi-quad example code provided by ADI without any modification.
- When running a dummy talk-through code in the DSP, I measure a total processing delay of 2.69 us. This sticks with my predictions.
- When adding one bi-quad filter to the DSP code, the total processing delay increases to 2,81 us only. How is that possible? Should not the filter buffers add some pipeline delay?
- When using 4 bi-quad filters instead of one, the processing delay remains at 2,81 us. How is that possible?
- When using 10 bi-quad filters, the processing delay increases to 2,92 us only. Same question.
The measured frequency responses in the different cases stick perfectly to what I expect (I am using cascaded, identical low-pass filters for testing), so I am sure that the bi-quads are correctly implemented.
I am measuring the input-to-output phase difference for a sinusoidal signal and deducing the processing delay by subtracting the phase lag associated with the filter at a given frequency.
I can not understand how come all these cascaded biquad filters do not add any significant delay. Am I doing something wrong when measuring this? Is it so that a change can be seen at the output of a cascade of IIR filters as soon as one sample enters at the input? Or maybe the bi-quad calculations are paralleled in some clever way by the ADI algorithm? I hope you can help me understand this.
Best regards,
Torje