Hi,
I could come across the detail that on successful restart on I2C the MEN bit do not reset.. When I added the line to reset the MEN bit in the software.. Blackfin released the Bus after transaction and I could successfully handle two masters and 1 slave on the single I2C bus,
Thanks
Below code for your reference and use if needed
void TWI_Reset(void)
{
*pTWI_CONTROL = RESET_TWI;
ssync();
*pTWI_MASTER_STAT = BUFWRERR|BUFRDERR|LOSTARB|ANAK|DNAK;
ssync();
*pTWI_INT_STAT = SINIT|SCOMP|SERR|SOVF|MCOMP|MERR|XMTSERV|RCVSERV;
ssync();
*pTWI_FIFO_CTL = XMTFLUSH|RCVFLUSH;
ssync();
}
void EEPROM_Write (char DeviceAddr, char Hi_MemAddr, char Lo_MemAddr, char *Data, unsigned short Count, unsigned short Data_Length)
{
TWI_Reset();
static int b,c;
*pTWI_FIFO_CTL =0;
*pTWI_CONTROL = TWI_ENA|PRESCALE_VALUE;
*pTWI_CLKDIV = ((CLKDIV_HI)<<8)|(CLKDIV_LO);
*pTWI_MASTER_ADDR = DeviceAddr>>1;
for(b=0; b<Count; b++)
{
*pTWI_XMT_DATA8 = Hi_MemAddr;
ssync();
*pTWI_MASTER_CTL = (Data_Length<<6)|MEN;
while(*pTWI_FIFO_STAT==XMTSTAT)
ssync();
*pTWI_XMT_DATA8 = Lo_MemAddr;
ssync();
for(c=0; c<(Data_Length-2); c++)
{
while(*pTWI_FIFO_STAT==XMTSTAT)
ssync();
*pTWI_XMT_DATA8 = *Data++;
ssync();
}
while((*pTWI_INT_STAT&MCOMP) ==0)
ssync();
*pTWI_INT_STAT = XMTSERV|MCOMP;
}
*pTWI_MASTER_CTL = *pTWI_MASTER_CTL & 0xFFFE;
asm("nop;");
asm("nop;");
asm("nop;");
}
void EEPROM_Read(char DeviceAddr,char Hi_MemAddr, char Lo_MemAddr, char *Data_Pointer, unsigned short Count)
{
TWI_Reset();
static int d;
static unsigned char eeprom_byte_address=0x00;
*pTWI_FIFO_CTL = 0;
*pTWI_CONTROL = TWI_ENA | PRESCALE_VALUE;
*pTWI_CLKDIV = ((CLKDIV_HI)<<8) | (CLKDIV_LO);
*pTWI_MASTER_ADDR = DeviceAddr>>1;
*pTWI_XMT_DATA8 = Hi_MemAddr;
ssync();
*pTWI_MASTER_CTL =0x80|MEN;
while((*pTWI_INT_STAT&XMTSERV)==0)
ssync();
*pTWI_INT_STAT = XMTSERV;
*pTWI_XMT_DATA8 = Lo_MemAddr;
ssync();
while((*pTWI_INT_STAT&XMTSERV)==0)
ssync();
*pTWI_INT_STAT = XMTSERV;
*pTWI_MASTER_CTL = MEN|RSTART|MDIR;
while((*pTWI_INT_STAT&MCOMP) ==0)
ssync();
*pTWI_INT_STAT = XMTSERV|MCOMP;
*pTWI_MASTER_CTL = *pTWI_MASTER_CTL|(Count<<6)|MEN;
ssync();
for(d=0; d<Count; d++)
{
while(*pTWI_FIFO_STAT == RCV_EMPTY)
ssync();
*Data_Pointer ++ =*pTWI_RCV_DATA8;
ssync();
}
while((*pTWI_INT_STAT & MCOMP)==0)
ssync();
*pTWI_INT_STAT = RCVSERV|MCOMP;
ssync();
*pTWI_MASTER_CTL = *pTWI_MASTER_CTL & 0xFFFE;
asm("nop;");
asm("nop;");
asm("nop;");
}