Hi Andy,
I've rechecked the dc_filter, and I think you missed a few things, like :
- dcfilt_offset - should be a 2's complement number, and it should use for known constant DC offset
- dcfilt_coeff - will be a coefficient with the format of 1.1.14 (sign, integer, fractional)
The filter settling time can be defined from the used coefficient, check out this doc, from Xilinx. Basically is up to you how define it, you can define a constant value or initially pick a bigger value than reduce it, after the filter settled up. The min/max of D in this case will come from the ad9643, which is a 14 bit adc.
I hope I could help, if you have any other concerns or question, feel free to ask.
Regards,
Istvan