Hi!
Thanks for your prompt response. Unfortunatelly I am not allowed to provide the schematic... Anyway, the SYNC signal is not shared at all, it is just wired from the uC to the DAC. Actually every single chip has its own dedicated chip select signal . The MOSI, MISO and SCK signals are shared by all the devices.
Therefore whenever I try to read data from the EEPROM, the SCK and MOSI signals are switched and the uC reads the data from the MISO, which is always LOW if the DAC is connected (even though SYNC is HIGH).
Regards,
Javi