Hi happywarwick
I can offer some suggestions to get you started.
1. In order to use the internal PLL correctly, you must do a VCO cal on startup, followed by a DAC cal. Do this after your master reset. VCO cal is done by setting and clearing CFR1 bit 24. DAC cal is done by setting and clearing CFR4 bit 24. See "DAC calibration output" on p. 20 of the datasheet (Rev. D) and "VCO calibration" on p.21.
2. For bits 19:16 of CFR3 try 1101 to enable the internal doubler and disable the internal divider. (You currently have 0110). This should help get your master clock right.