Hello Dave.
At first thanks a lot for your work.
But one thing.
You are right that SDA and SCL have almost same layout.
But BF533 GPIO pin doesn't work same for both SDA ans SCL.
Let me explain why.
SCL line is unidirectional and BF533 GPIO assigned as SCL always works as output.
SCL GPIO has two states log. 0 output and log. 1 output.
SDA line is bidirectional.
SDA GPIO has two states log. 0 output and INPUT. It doesn't has log. 1 output.
If I put log. 1 output at SDA pin we can see short circuit at slave ACK signal.
So, Hyperlynx results are correct for falling edge (1->0) of both signals SDA and SCL.
And Hyperlynx results are correct for rising edge (0->1) for SCL signal.
But now we have not test results for SDA rising edge.
This time is defined with RC circuit charging time. Where R is pullup 4.7K and C is 33pF plus parasitic
capacitance of track and BF533 input, and SSM2603 input.
This time should be hundred nanoseconds.
Thanks in advance!