I am using the AD8219 current sense amplifier in a battery charger design. The current sense amplifier input has a 8.3 milliohm sense resistor between the +in and -in pin. The sense resistor is between the charging circuit's inductor and output capacitor. The bias voltage, pin 2, Vs, is independently generated via a linear reg at 8.5 V. I use three capacitors to eliminate noise-one differential and two common mode.
I was having problems with negative voltage spikes. See the oscope screen shot below. I had 0.47 uF capacitors placed common mode and differential mode. The negative spike always occurs at 2.2 V and is about -1V and 200 us wide. Failures occurred on a random basis. The maximum negative voltage allowed at the +in and -in pin per the data sheet is -0.3 V. I am assuming the failures were random due to the pulse width of the voltage spike. My first question is, is this a correct assumption?
We changed out the common and differential mode capacitors to lower values, but no change at all. Changed the values of the output capacitors of the charger, still no change. The load switch going to the battery is in the off position until the charger voltage reaches 8.5 Vs, so the battery has no effect.
The current sense amplifier input has a 8.3 milliohm sense resistor between the +in and -in pin. The bias voltage, pin 2, Vs is independently generated via a linear reg at 8.5 V.
See the figure below.
Negative going spike was eliminated by removing the independent bias power and tying the Vs, or bias pin to the +in pin. My second question is why? Is there something inside the AD8219 chip that causes the +in and -in pins to source current out when the Vs pin is at a higher voltage than the +in or -in pin?
Thanks for the help.