Hello,
Answers to your questions are as follows:
1) No.
2) You can check after STEP 4 above (i.e. Enable PLL auto band select to determine if PLL is locked). This could be the only instance where one could possibly add wait.before checking PLL status...........if SPI clock is operating at high rate (up to 25 MHz).
3) Optional since the SPI protocol should be robust and not require verficiation of each regiser WRITE via readback.
Regards.