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Re: ADV7513 and bt.565 (PAL)

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To Sasa.

Thanks for your suggestion.

I tried a few times as your advice, and checked 0x42[6:5] = 0b11;

while, the register 0x9E[4] was 0. That meas PLL Not Locked.

Then, I checked the input clock and stored a wave picture attached.

F0001TEK.BMP

Here is also a picture of TMDS TXC+/- wave. I could not understand how it comes.

F0000TEK.BMP

Looking foward to your help. Thanks.

 

Smilence.


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