Dear Git,
You posted a XLS file with entries like this- 0x7fff7fff C08700870FFFFF790F7900001000180018001800100018001 4380A7D9CE80017FFF80017FFF017C02008001800100018001
And said you couldn't relate the signals. I asked you to create the signals using the CDC or the Verilog code. And I get back a plot with "DATA"!
You figured something out in between, which is good. But you must understand that I can not see what you are doing. So it is important to be descriptive as much as you can and keep the conversation in sync.
Now there is an error about invalid loads, what is it that I can do without looking at the source code in this case? I am guessing you have figured out that too.
So let's jump into your latest question:
There is a text file which appears to be an array of square wave values.
Assuming it is in I/Q format, you are missing the phase offset.
There are 4 parallel samples to the DAC- can you post a chipscope plot of these 4 samples (separated buses)?
There are 2 samples from the ADC, post that too.
If you have solved this yourself, be specific before jumping to the next question.
Thanks,
Rejeesh