Hi there,
the AD7764 runs with an interface which is fully synchronous the MCLK (sampling clock of the modulator).
This enables the ADC interface to run and clock within constant/known time slot related to the actual analog input sampling.
The AD7764 is a master SPI as you mention - it means that the user must have the controller operate in the Slave mode SPI format. The framing signal (DRDY) will frame the 32-bit output of the ADC before changing logic state to indicate the final bit of the conversion result + status has been output.
What digital host platform do you need to connect the ADC to?
Regards,
M.