The issue was that the PLL had been altered from hardware defaults so the SPI clock was running too fast. Restoring VrCtl, PllCtl and PllDiv to hardware faults has fixed the problem.
↧
Channel:
EngineerZone: Message List
X
Are you the publisher?
Claim or
contact us
about this channel.
X
0
Channel Details:
- Title: EngineerZone: Message List
- Channel Number: 24257032
- Language: English
- Registered On: November 26, 2013, 5:56 am
- Number of Articles: 22625
- Latest Snapshot: August 27, 2018, 12:43 am
- RSS URL: http://ez.analog.com/community/feeds/messages?rssusername=eschink
- Publisher: https://ez.analog.com/?view=discussions
- Description: Most recent forum messages
- Catalog: //subsister55.rssing.com/catalog.php?indx=24257032
© 2025 //www.rssing.com