Writing this in order to help others with same issue.
This is the information I've got for SVGA:
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SVGA Signal 800 x 600 @ 60 Hz timing
General timing
Screen refresh rate 60 Hz
Vertical refresh 37.878787878788 kHz
Pixel freq. 40.0 MHz
Horizontal timing (line)
Polarity of horizontal sync pulse is positive.
Scanline part Pixels Time [µs]
Visible area 800 20
Front porch 40 1
Sync pulse 128 3.2
Back porch 88 2.2
Whole line 1056 26.4
Vertical timing (frame)
Polarity of vertical sync pulse is positive.
Frame part Lines Time [ms]
Visible area 600 15.84
Front porch 1 0.0264
Sync pulse 4 0.1056
Back porch 23 0.6072
Whole frame 628 16.5792
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Lets say that this is correct. Looking at picture 7 (Active Video) I get the parameters like so:
HS_DELAY (Pixels) = sync pulse + back porch - 1 (as per 4.3.7.1 in datasheet) = 215
VS_DELAY (Lines) = sync pulse + back porch = 27
WIDTH (Pixels) = 800
HEIGHT (Lines) = 600
Why not just explaining this in the documentation? Almost everyone knows about concepts like back and front porch.
Anyway, for HS DELAY [11:0], register 0xFB[7] contains bits [11], register 0x35[7:0] contains bits [10:2] and register 0x36[7:6] contains bits [1:0].
0xFB[7] should be loaded with ((HS_DELAY>>11)&0x01)<<7 = 0x00
0x35[7:0] should be loaded with ((HS_DELAY>>2)&0xFF)<<0 = 0x35
0x36[7:6] should be loaded with (HS_DELAY&0x03)<<6 = 0xC0
For VS DELAY [7:0], register 0xFB[6:5] contains bits [7:6] and register 0x36[5:0] contains bits [5:0].
0xFB[6:5] should be loaded with ((VS_DELAY>>6)&0x03)<<5 = 0x00
0x36[5:0] should be loaded with ((VS_DELAY>>0)&0x3F)<<0 = 0x1B
For WIDTH [12:0], register 0xFB[4] contains bits [12], register 0x37[4:0] contains bits [11:7] and register 0x38[7:1] contains bits [6:0].
0xFB[4] should be loaded with ((WIDTH>>12)&0x01)<<4 = 0x00
0x37[4:0] should be loaded with ((WIDTH>>7)&0x1F)<<0 = 0x06
0x38[7:1] should be loaded with ((WIDTH>>0)&0xEF)<<1 = 0x40
For HEIGHT [12:0], register 0xFB[3] contains bits [12], regsiter 0x39[7:0] contains bits [11:4] and register 0x3A[7:4] contains [3:0].
0xFB[3] should be loaded with ((HEIGHT>>12)&0x01)<<3 = 0x00
0x39[7:0] should be loaded with ((HEIGHT>>4)&0xFF)<<0 = 0x25
0x3A[7:4] should be loaded with ((HEIGHT<<0)&0x0F)<<4 = 0x80
Consequently, we end up with these register values:
reg 0x35: 0x35
reg 0x36: 0xC0
reg 0x36: 0x1B (RMW) = 0xC0 | 0x1B = 0xDB
reg 0x37: 0x06
reg 0x38: 0x40
reg 0x39: 0x25
reg 0x3A: 0x80
reg 0xFB: 0x00 (RMW)
The above reasoning seems to be correct since when I cross check with an already present format in the data sheet e.g. 720p@60Hz i get the same numbers.
HS_DELAY (Pixels) = sync pulse + back porch = 40 + 219 = 259
VS_DELAY (Lines) = sync pulse + back porch = 5 + 20 = 25
WIDTH (Pixels) = 1280
HEIGHT (Lines) = 720
reg 0x35: ((HS_DELAY>>2)&0xFF)<<0 = 0x40
reg 0x36: (HS_DELAY&0x03)<<6 = 0xC0
reg 0x36: ((VS_DELAY>>0)&0x3F)<<0 = 0x19 (RMW) = 0xC0 | 0x19 = 0xD9
reg 0x37: ((WIDTH>>7)&0x1F)<<0 = 0x0A
reg 0x38: ((WIDTH>>0)&0xEF)<<1 = 0x00
reg 0x39: ((HEIGHT>>4)&0xFF)<<0 = 0x2D
reg 0x3A: ((HEIGHT<<0)&0x0F)<<4 = 0x00
reg 0xFB: 0x00 (RMW)
Regards,
StaringL