Quantcast
Channel: EngineerZone: Message List
Viewing all articles
Browse latest Browse all 22625

Re: HMC679 reset pin

$
0
0

hi pelican2,

 

The datasheet specifies that the HMC679LC3C are Current Mode Logic (CML) logic levels but I guess it needs to be more clear and improved.  I have attached the application note which describe in details this versatile I/O interface in section 3.  Figure 3.2,3.3 give you the min.max levels of the CML Input.  For full speed of 26GHz,the I/O should be interfaced with widely used advance 1.2V CML FPGA's. Section 4 of the document gives all possible interface circuits to different I/O standards.


Viewing all articles
Browse latest Browse all 22625


<script src="https://jsc.adskeeper.com/r/s/rssing.com.1596347.js" async> </script>