DAQ2 AD9680 Xilinx JESD204 Core

As I have seen the DAQ2 evaluation board HDL reference design uses the Xilinx JESD204 Core which has to be purchased. I'm not sure which part of Xilinx Core is needed because the high-speed link data is processed by the Analog Devices Core (axi_jesd_gt_v1_0). Only a few signal from the Xilinx Core are used (like sof, sync, ..). Is a reference design available which works without the Xilinx JESD204 Core?

Thanks,

Peter