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Re: PLL loop filter

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Hi Brigid,

 

Everything you say is correct, yet what I really wanted to know was exactlywherewhat I said was incorrect. Let's see if we can agree on exactly where my argument was wrong. I am a great believer in the principle that if you properly understand something, then you should be able to reach the same conclusion no matter which angle you look from.

 

The gain of both integrators increases with decreasing frequency (as with all integrators), so we can state with certainty that at some sufficiently low frequency, the gain will be greater than one, and the total phase lag equal to 180 degrees ...

This statement is correct.


Now, as we know, if the loop gain is greater than or equal to one, at a frequency where the total phase lag is 180 degrees, then the loop will be unstable and oscillate.

This appears to be the well known Barkhausen stability criterion. Unfortunately this version of the criterion is wrong, though is commonly stated in the literature, so I feel slightly less silly. Full details can be found in Wikipedia under 'Barkhausen Stability Criterion'. Note the paragraph on 'Erroneous version'.

 

The correct statement is therefore:

if the loop gain is equal to one, at a frequency where the total phase lag is 180 degrees, then the loop will be unstable and oscillate.

 

As per the erroneous version, one could be forgiven for thinking that if the loop gain was even greater than one when the feedback was positive (ie additional lag of 180 degrees), then the circuit would be even less stable. This is frequently correct, but not always correct, as this example shows. I will be more careful in the future. The correct criterion is also consistent with the definition of phase margin, also defined at a loop gain of one.

 

You mention ADIsimPLL taking the work out of filter design, but our application is so different that the normal PLL loop filter designs are not relevant. In any event, I would never design or build anything that I did not completely understand. I'm never comfortable with 'black box' engineering. FYI our application is a laser 'offset lock', meaning we phase lock the frequency of a slave laser at a fixed offset frequency from a very stable master laser. The IR lasers operate at around 2E14Hz (200,000GHz), and we require a frequency offset of 3GHz. We measure the offset by shining the 2 lasers on a fast photodiode to produce a beat (difference) signal. The 3Ghz beat is then sent to the RF input of an ADF4108, which compares the phase with a 100MHz stable reference frequency in the normal way using appropriate input and reference dividers. The PFD output then drives the frequency-control input of the slave laser, so as to phase lock it's frequency to exactly 3GHz below that of the master laser. Therefore, in effect our VCO is a voltage-tunable laser. However, a very important difference is that the bandwidth of the laser frequency-control input is only a few hundred Hz, whereas with an electronic VCO it is virtually unlimited, and this means that our loop filter must be designed differently. I'm sure I'll have no problems getting the loop to work exactly as I wish, as I've never had problems before with any other feedback loop. What it means is that the loop filter and lock time will necessarily be SLOW, but for us that does not matter. I'm confident it will all work perfectly.

 

Cheers, Colin

 

PS. If you disagree with my analysis of exactly where my original discussion was wrong, then let me know.


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